Keynote Speakers

Monday | October 28, 2024 

Three dimensional integration is one of the major technology directions for integrated circuits [1]. Nanosystems of 3D integrated “X” technology (N3XT) is a key concept at the chip level, where X can be memory, photonics, spintronics, power electronics, nanomechanics, sensors and actuators, and RF/mm-wave [2]. We must also go beyond a single chip from a wafer and focus on integrating chips into systems using MOSAIC (MOnolithic Stacked Assembled IC) [3]. These future 3D systems require a complete overhaul of the design methodology and design automation. Designs of 3D systems must start from the fundamental assumption that interconnections are in 3D and the interconnection density in all three dimensions are equally dense and efficient. This presents tremendous opportunities for research on system architecture and design automation.

Tuesday | October 29, 2024

In 2030 we will be able to produce 200B transistor monolithic chips and over 1T 3D integrated multi-chiplet solutions. These will get generated from a few million lines of RTL. A massive generation effort. But how much of this will be done with generative AI? How much will be done by classical optimization methods?

As with any new technology there are a lot of open questions. Why can’t we create a L*M to take a processor written in Verilog and generate 1nm DRC clean and timing optimized layout and by-pass the entire EDA stack? Or can we? What is the place of generative AI in Hardware design? This keynote will give some food for thought to ponder these questions.

Tuesday | October 29, 2024

Wednesday | October 30, 2024